1. Field of Invention
The present invention relates to a thin film transistor (TFT) array substrate and a method for manufacturing the same, and more particularly, to a TFT array substrate with a color filter on array (COA) and a method for manufacturing the same.
2. Description of Related Art
With the advantages of high definition, small volume, light weight, low voltage drive, low power consumption and wide applications, the liquid crystal display (LCD) has replaced the cathode ray tube (CRT) to become the mainstream of the new generation display. The conventional liquid crystal display (LCD) panel is formed by a color filter substrate, a TFT array substrate and a liquid crystal layer sandwiched there-between. In order to enhance the resolution of the panel and the aperture ratio of the pixels of the panel, and to avoid the alignment error when the color filter substrate is assembled to the TFT array substrate, a color filter on array (hereafter called COA) technique has been provided.
US Patent Publication NO. 20050117082 provides a structure integrated color filter patterns with a TFT array substrate and a manufacturing method thereof. FIG. 1 is a top view of the TFT array substrate, and FIG. 2 is a partial cross-sectional view of the TFT array substrate of FIG. 1. Referring to FIGS. 1 and 2, when manufacturing the TFT array substrate, firstly, a Ti/Al metal layer is formed on a transparent glass substrate 101, and gates 102 and gate lines 201 are patterned by the first mask process. Next, a gate insulating layer 103 made of silicon nitride (SiNX), an amorphous silicon (a-Si) layer 104, an n-doped a-Si (n+a-Si) layer 105 and a chromium (Cr) layer 106 are deposited over the substrate 101 in succession, and then, the second mask process is performed to form island structures and data lines 202. Then, the light transitive red photosensitive resin, green photosensitive resin and blue photosensitive resin are formed over the substrate 101 in sequence, and then, the third to fifth mask processes are performed, so as to form the red filter units, green filter units and blue filter units in the specific pixel areas.
Referring to FIGS. 1 and 2, through the sixth mask process, an opaque black photosensitive resin 240 is formed over the island structures, the gate lines 201 and the data lines 202, wherein a part of the black photosensitive resin 240 over the channel area of the island structures is removed, and the black photosensitive resin 240 located over the gate terminal ports 251 is also removed. Then, the black photosensitive resin 240 serves as the mask to perform the etching process, so as to form the TFT structures. Next, a transparent photosensitive resin is completely formed over the substrate 101 to serve as a planarization layer 107, and then, through the seventh mask process, openings are formed in the planarization layer 107 over a part of the sources/drains 206, a part of the gate terminal ports 251 and a part of the data terminal ports 261 respectively. Moreover, the planarization layer 107 serves as a mask to etch the black photosensitive resin 240 and to etch the gate insulating layer 103 on the gate terminal ports 251, so as to form contact windows 221, gate terminal port contact windows 252 and data terminal port contact windows 262 on the corresponding island structures. Next, a transparent electrode layer 108 is formed on the planarization layer 107, and then, the eighth mask process is performed to form pixel electrodes 203, which are connected to the corresponding sources/drains 206 via the corresponding contact windows 221, and form gate terminal port contacts 250 and data terminal port contacts 260. Till now, the process of manufacturing a TFT array substrate almost has been finished.
It should be noted that, the conventional method of manufacturing the TFT array substrate needs at least eight mask processes, thus, the steps are complex and the manufacturing cost is relatively high. Moreover, since contact windows with high aspect ratio are required to be formed in relatively thick film layers such as the color filter layer and the planarization layer, for connecting the pixel electrodes and the corresponding sources/drains, the difficulty of the manufacturing process is relatively increased, and the production yield is affected.